9909c9f222
Add Doxygen documentation comments to the HAL, GPIO and chip types
2026-06-03 18:10:58 -03:00
638883bf39
Add a Initialize method on the YMF262-HAL.hpp to initialize he IC with the proper order
2026-06-03 15:07:04 -03:00
53f5251f3d
Update the YMF262-HAL.hpp to add the initial_clear function to clear the YMF262 ic
2026-06-03 15:00:38 -03:00
ec589d929a
Update the timing for the delays and also create the Write method on the HAL to choreograph the writing process in the YMF262 and create the Set_OPL_Mode , and also created the YMF262-Types.hpp to hold types used by the YMF262
2026-06-03 14:13:50 -03:00
17b754c864
Update README.md with testing instructions and some grammar improvements
2026-06-03 12:32:22 -03:00
2172ed0735
Create write unit test to check the proper choreography and delays, and add CMakeLists.txt for compiling the unit tests
2026-06-03 12:25:03 -03:00
8e4fceec7e
Create the FakeGPIO.hpp to be used as Mock for testing and Update the timing for the delays and also create the Write method on the HAL to choreograph the writing process in the YMF262
2026-06-03 12:23:00 -03:00
7898563f39
Add the write method on the YMF262 hal and cretead a policy based system to manipulate gpio
2026-06-03 08:59:15 -03:00
682f8e1753
Updated the gitignore to properly ignore the build folder
2026-06-03 02:10:52 -03:00
8010c9355b
Started Adding Template on YMF262 HAL to allow GPIO Manipulation thru policies
2026-06-01 20:01:49 -03:00
92b9f02577
Start Implenting the YMF262 HAL layer
2026-04-29 22:55:41 -03:00
49fd6664cc
Create The Basic Skeleton for the YMF262 HAL
2026-04-29 17:40:09 -03:00
e7d5b47ddf
Update README.md
2026-04-29 17:02:23 -03:00
9758181bda
Add README.md
2026-04-29 02:26:18 -03:00
7245a328f6
Add .gitignore
2026-04-29 02:25:46 -03:00
297cf1a201
Configure YMF262 parallel bus GPIO and fix PLL settings
...
Add D0-D7 data bus (GPIOC), control signals _WR/_RD/_CS/_IC and
address lines A0/A1 (GPIOF), and _IRQ input for the YMF262 interface.
Fix PLL parameters (PLLM=8, PLLN=432, PLLQ=12) for correct 216 MHz
operation from the 8 MHz HSE, and switch USB 48 MHz clock to PLLSAI.
2026-04-29 01:43:00 -03:00
bf6cec40d1
Initial Commit
2026-04-28 20:15:35 -03:00
Gustavo Henrique Santos Souza de Miranda